VMX Capabilities

		Wolfdale	Arrandale	Clarkdale	Sandy Bridge	Ivy Bridge	Haswell	Skylake	Coffee Lake	Skylake-X	Ice Lake	Comet Lake	Tiger Lake	Alder Lake
	Bitsize	E7500	370M	650	2320	3770	4600U	6500	8109U	9980XE	1005G1	10110U	1185G7	12900K
IA32_VMX_BASIC	64	005A08000000000Dh	00DA04000000000Fh	00DA04000000000Fh	00DA040000000010h	00DA040000000010h	00DA040000000012h	00DA040000000004h	00DA040000000004h	00DA040000000004h	00DA050000000013h	00DA040000000004h	01DA050000000013h	03DA050000000013h
VMCS Revision ID	31	Dh	Fh	Fh	10h	10h	12h	4h	4h	4h	13h	4h	13h	13h
Reserved 0	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
VMX structures size	13	800h	400h	400h	400h	400h	400h	400h	400h	400h	500h	400h	500h	500h
Reserved 0	3	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Physical addresses are limited to 32 bits	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Dual-monitor treatment	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Cache type for VMCS structures and MSEG	4	6h	6h	6h	6h	6h	6h	6h	6h	6h	6h	6h	6h	6h
Report VM Exit instruction info on INS and OUTS	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
TRUE capability MSRs support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Deliver a HW exception error code for any vector	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
Reserved 0	7	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
IA32_VMX_PINBASED_CTLS	64	0000003F00000016h	0000007F00000016h	0000007F00000016h	0000007F00000016h	0000007F00000016h	0000007F00000016h	0000007F00000016h	0000007F00000016h	000000FF00000016h	000000FF00000016h	0000007F00000016h	000000FF00000016h	000000FF00000016h
Allowed Zero Settings	32	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h
External-interrupt exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
NMI exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Virtual NMIs	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Activate VMX-preemption timer	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Process posted interrupts	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	24	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	000000000000003Fh	000000000000007Fh	000000000000007Fh	000000000000007Fh	000000000000007Fh	000000000000007Fh	000000000000007Fh	000000000000007Fh	00000000000000FFh	00000000000000FFh	000000000000007Fh	00000000000000FFh	00000000000000FFh
External-interrupt exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
NMI exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Virtual NMIs	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Activate VMX-preemption timer	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Process posted interrupts	1	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h	0h	1h	1h
Reserved	24	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_PROCBASED_CTLS	64	F7F9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFF9FFFE0401E172h	FFFBFFFE0401E172h	FFFBFFFE0401E172h
Allowed Zero Settings	32	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h	000000000401E172h
Reserved	2	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h
Interrupt-window exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use TSC offsetting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	3	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h
HLT exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
INVLPG exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
MWAIT exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
RDPMC exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
RDTSC exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
CR3-load exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
CR3-store exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR8-load exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR8-store exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use TPR shadow	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
NMI-window exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
MOV-DR exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Unconditional I/O exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use I/O bitmaps	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Monitor trap flag	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use MSR bitmaps	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
MONITOR exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PAUSE exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Activate secondary controls	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	00000000F7F9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFFBFFFEh	00000000FFFBFFFEh
Reserved	2	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h
Interrupt-window exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Use TSC offsetting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	3	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h
HLT exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
INVLPG exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MWAIT exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
RDPMC exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
RDTSC exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
CR3-load exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
CR3-store exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR8-load exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
CR8-store exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Use TPR shadow	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
NMI-window exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MOV-DR exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Unconditional I/O exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Use I/O bitmaps	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Monitor trap flag	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Use MSR bitmaps	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MONITOR exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PAUSE exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Activate secondary controls	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
IA32_VMX_EXIT_CTLS	64	0003FFFF00036DFFh	007FFFFF00036DFFh	007FFFFF00036DFFh	007FFFFF00036DFFh	007FFFFF00036DFFh	007FFFFF00036DFFh	01FFFFFF00036DFFh	01FFFFFF00036DFFh	01FFFFFF00036DFFh	037FFFFF00036DFFh	01FFFFFF00036DFFh	137FFFFF00036DFFh	F77FFFFF00036DFFh
Allowed Zero Settings	32	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh	0000000000036DFFh
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Save debug controls	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	6	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh
Host address space size 64	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Load IA32_PERF_GLOBAL_CTRL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Acknowledge interrupt on exit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Save IA32_PAT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_PAT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Save IA32_EFER	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_EFER	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Save VMX-preemption timer value	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Clear IA32_BNDCFGS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Conceal VM exits from Intel PT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Clear IA32_RTIT_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Clear IA32_LBR_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Clear UINV	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load CET state	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load PKRS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Save IA32_PERF_GLOBAL_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Activate secondary exit controls	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	000000000003FFFFh	00000000007FFFFFh	00000000007FFFFFh	00000000007FFFFFh	00000000007FFFFFh	00000000007FFFFFh	0000000001FFFFFFh	0000000001FFFFFFh	0000000001FFFFFFh	00000000037FFFFFh	0000000001FFFFFFh	00000000137FFFFFh	00000000F77FFFFFh
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Save debug controls	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	6	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh
Host address space size 64	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Load IA32_PERF_GLOBAL_CTRL	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Acknowledge interrupt on exit	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Save IA32_PAT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_PAT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Save IA32_EFER	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_EFER	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Save VMX-preemption timer value	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Clear IA32_BNDCFGS	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	0h	1h	0h	0h
Conceal VM exits from Intel PT	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
Clear IA32_RTIT_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	1h	1h
Clear IA32_LBR_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Clear UINV	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load CET state	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
Load PKRS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Save IA32_PERF_GLOBAL_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Activate secondary exit controls	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
IA32_VMX_ENTRY_CTLS	64	00003FFF000011FFh	0000FFFF000011FFh	0000FFFF000011FFh	0000FFFF000011FFh	0000FFFF000011FFh	0000FFFF000011FFh	0003FFFF000011FFh	0003FFFF000011FFh	0003FFFF000011FFh	0006FFFF000011FFh	0003FFFF000011FFh	0016FFFF000011FFh	0076FFFF000011FFh
Allowed Zero Settings	32	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh	00000000000011FFh
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Load debug controls	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	6	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh
IA-32e mode guest	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Entry to SMM	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Deactivate dual-monitor treatment	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_PERF_GLOBAL_CTRL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_PAT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_EFER	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_BNDCFGS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Conceal VM entries from Intel PT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_RTIT_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load UINV	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load CET state	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load guest IA32_LBR_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load PKRS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	9	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	0000000000003FFFh	000000000000FFFFh	000000000000FFFFh	000000000000FFFFh	000000000000FFFFh	000000000000FFFFh	000000000003FFFFh	000000000003FFFFh	000000000003FFFFh	000000000006FFFFh	000000000003FFFFh	000000000016FFFFh	000000000076FFFFh
Reserved	2	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Load debug controls	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	6	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh
IA-32e mode guest	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Entry to SMM	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Deactivate dual-monitor treatment	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_PERF_GLOBAL_CTRL	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_PAT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_EFER	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_BNDCFGS	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	0h	1h	0h	0h
Conceal VM entries from Intel PT	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
Load IA32_RTIT_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	1h	1h
Load UINV	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load CET state	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
Load guest IA32_LBR_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Load PKRS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Reserved	9	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_MISC	64	00000000000403C0h	00000000000401E7h	00000000000401E7h	00000000100401E5h	00000000100401E5h	00000000300481E5h	000000007004C1E7h	000000007004C1E7h	000000007004C1E7h	000000007004C1E7h	000000007004C1E7h	000000007004C1E7h	000000007004C1E7h
Relationship between VMX-preemption timer and TSC	5	0h	7h	7h	5h	5h	5h	7h	7h	7h	7h	7h	7h	7h
Save IA32_EFER.LMA	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Support for activity state 1 (HLT)	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Support for activity state 2 (shutdown)	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Support for activity state 3 (wait-for-SIPI)	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	5	1h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Intel PT can be used in VMX operation	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
SMM IA32_SMBASE MSR read support	1	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h
Number of CR3-target values supported	9	4h	4h	4h	4h	4h	4h	4h	4h	4h	4h	4h	4h	4h
Recommended maximum number of MSRs saved in MSR-store list	3	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_SMM_MONITOR_CTL can be set to 1	1	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
VMWRITE on VM-exit info fields supported	1	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h
Event injection with instruction length 0	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
MSEG revision ID	32	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR0 Fixed 0	64	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h	0000000080000021h
PE Protection Enable	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MP Monitor Coprocessor	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
EM Emulation	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
TS Task Switched	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
ET Extension Type	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
NE Numeric Error	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	10	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
WP Write Protect	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
AM Alignment Mask	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	10	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
NW Not Write-through	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CD Cache Disable	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PG Paging	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	32	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR0 Fixed 1	64	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh	00000000FFFFFFFFh
PE Protection Enable	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MP Monitor Coprocessor	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
EM Emulation	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
TS Task Switched	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
ET Extension Type	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
NE Numeric Error	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	10	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh
WP Write Protect	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
AM Alignment Mask	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	10	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh	3FFh
NW Not Write-through	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
CD Cache Disable	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PG Paging	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	32	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR4 Fixed 0	64	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h	0000000000002000h
VME Virtual-8086 Mode Extensions	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PVI Protected-Mode Virtual Interrupts	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
TSD Time Stamp Disable	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
DE Debugging Extensions	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PSE Page Size Extensions	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PAE Physical Address Extension	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
MCE Machine-Check Enable	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PGE Page Global Enable	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PCE Performance-Monitoring Counter Enable	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
OSFXSR Operating System Support for FXSAVE and FXRSTOR instructions	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
OSXMMEXCPT Operating System Support for Unmasked SIMD Floating-Point Exceptions	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
UMIP User-Mode Instruction Prevention	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
LA57 57-bit linear addresses	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
VMXE VMX-Enable Bit	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
SMXE SMX-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
FSGSBASE FSGSBASE-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PCIDE PCID-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
OSXSAVE XSAVE and Processor Extended States-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Key-Locker-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
SMEP SMEP-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
SMAP SMAP-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PKE Protection-Key-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CET Control-flow Enforcement Technology	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PKS Enable protection keys for supervisor-mode pages	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved 0	9	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR4 Fixed 1	64	00000000000427FFh	00000000000227FFh	00000000000267FFh	00000000000627FFh	00000000001767FFh	00000000001767FFh	00000000003767FFh	00000000003727FFh	00000000003727FFh	0000000000772FFFh	00000000003727FFh	0000000000FF6FFFh	0000000001FF6FFFh
VME Virtual-8086 Mode Extensions	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PVI Protected-Mode Virtual Interrupts	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
TSD Time Stamp Disable	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
DE Debugging Extensions	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PSE Page Size Extensions	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PAE Physical Address Extension	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MCE Machine-Check Enable	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PGE Page Global Enable	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PCE Performance-Monitoring Counter Enable	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
OSFXSR Operating System Support for FXSAVE and FXRSTOR instructions	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
OSXMMEXCPT Operating System Support for Unmasked SIMD Floating-Point Exceptions	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
UMIP User-Mode Instruction Prevention	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	1h	1h
LA57 57-bit linear addresses	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
VMXE VMX-Enable Bit	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
SMXE SMX-Enable Bit	1	0h	0h	1h	0h	1h	1h	1h	0h	0h	0h	0h	1h	1h
Reserved	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
FSGSBASE FSGSBASE-Enable Bit	1	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PCIDE PCID-Enable Bit	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
OSXSAVE XSAVE and Processor Extended States-Enable Bit	1	1h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Key-Locker-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
SMEP SMEP-Enable Bit	1	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h
SMAP SMAP-Enable Bit	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
PKE Protection-Key-Enable Bit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	1h	1h
CET Control-flow Enforcement Technology	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
PKS Enable protection keys for supervisor-mode pages	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Reserved 0	9	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_VMCS_ENUM	64	000000000000002Ch	000000000000002Ah	000000000000002Ah	000000000000002Ah	000000000000002Ah	000000000000002Ah	000000000000002Eh	000000000000002Eh	000000000000002Eh	000000000000002Eh	000000000000002Eh	000000000000002Eh	000000000000002Eh
Reserved 0	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Highest index value used for any VMCS encoding	9	16h	15h	15h	15h	15h	15h	17h	17h	17h	17h	17h	17h	17h
Reserved 0	54	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_PROCBASED_CTLS2	64	0000004100000000h	000000FF00000000h	000000FF00000000h	000000FF00000000h	000008FF00000000h	00007CFF00000000h	001FFCFF00000000h	005FBCFF00000000h	025D3FFF00000000h	335FBFFF00000000h	005FBCFF00000000h	035F7FFF00000000h	0F5D7FFF00000000h
Allowed Zero Settings	32	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h
Virtualize APIC accesses	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable EPT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Descriptor-table exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable RDTSCP	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Virtualize x2APIC mode	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable VPID	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
WBINVD exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Unrestricted guest	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
APIC-register virtualization	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Virtual-interrupt delivery	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PAUSE-loop exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
RDRAND exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable INVPCID	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable VM functions	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
VMCS shadowing	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable ENCLS exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
RDSEED exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable PML	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
EPT-violation #VE	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Conceal VMX non-root operation from Intel PT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable XSAVES/XRSTORS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PASID translation	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Mode-based execute control for EPT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Sub-page write permissions for EPT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Intel PT uses guest physical addresses	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use TSC scaling	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable user wait and pause	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable PCONFIG	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Enable ENCLV exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	3	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	0000000000000041h	00000000000000FFh	00000000000000FFh	00000000000000FFh	00000000000008FFh	0000000000007CFFh	00000000001FFCFFh	00000000005FBCFFh	00000000025D3FFFh	00000000335FBFFFh	00000000005FBCFFh	00000000035F7FFFh	000000000F5D7FFFh
Virtualize APIC accesses	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Enable EPT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Descriptor-table exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Enable RDTSCP	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Virtualize x2APIC mode	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Enable VPID	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
WBINVD exiting	1	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Unrestricted guest	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
APIC-register virtualization	1	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h	0h	1h	1h
Virtual-interrupt delivery	1	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h	0h	1h	1h
PAUSE-loop exiting	1	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h
RDRAND exiting	1	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Enable INVPCID	1	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h
Enable VM functions	1	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h
VMCS shadowing	1	0h	0h	0h	0h	0h	1h	1h	0h	0h	0h	0h	1h	1h
Enable ENCLS exiting	1	0h	0h	0h	0h	0h	0h	1h	1h	0h	1h	1h	0h	0h
RDSEED exiting	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
Enable PML	1	0h	0h	0h	0h	0h	0h	1h	1h	0h	1h	1h	1h	0h
EPT-violation #VE	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
Conceal VMX non-root operation from Intel PT	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
Enable XSAVES/XRSTORS	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
PASID translation	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Mode-based execute control for EPT	1	0h	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h
Sub-page write permissions for EPT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Intel PT uses guest physical addresses	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	1h	1h
Use TSC scaling	1	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h	0h	1h	1h
Enable user wait and pause	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Enable PCONFIG	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Enable ENCLV exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	0h	0h
Reserved	3	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	0h	0h
IA32_VMX_EPT_VPID_CAP_MSR	64	0000000000000000h	00000F0106114141h	00000F0106114141h	00000F0106114141h	00000F0106114141h	00000F0106334141h	00000F0106334141h	00000F0106734141h	00000F0106734141h	00000F0106734141h	00000F0106734141h	00000F0106F34141h	00010F0106F34141h
Execute-only allowed in EPT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	5	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Support for a page-walk length of 4	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
EPT may be UC	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	5	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
EPT may be WB	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
2 MB pages allowed in EPT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
1 GB pages allowed in EPT	1	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	2	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
INVEPT support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Accessed and Dirty flags in EPT support	1	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h
Advanced exit info for EPT	1	0h	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h
Supervisor shadow stack support	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
Reserved 0	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Single-context INVEPT support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
All-context INVEPT support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	5	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
INVVPID support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	7	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Individual address INVVPID support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Single-context INVVPID support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
All-context INVVPID support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Single-context-retaining-globals INVVPID support	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved 0	4	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Max HLAT prefix size	5	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Reserved 0	11	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_TRUE_PINBASED_CTLS	64	0000000000000000h	0000007F00000016h	0000007F00000016h	0000007F00000016h	0000007F00000016h	0000007F00000016h	0000007F00000016h	000000FF00000016h	000000FF00000016h	000000FF00000016h	0000007F00000016h	000000FF00000016h	000000FF00000016h
Allowed Zero Settings	32	0000000000000000h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h	0000000000000016h
External-interrupt exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
NMI exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Virtual NMIs	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Activate VMX-preemption timer	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Process posted interrupts	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	24	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	0000000000000000h	000000000000007Fh	000000000000007Fh	000000000000007Fh	000000000000007Fh	000000000000007Fh	000000000000007Fh	00000000000000FFh	00000000000000FFh	00000000000000FFh	000000000000007Fh	00000000000000FFh	00000000000000FFh
External-interrupt exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
NMI exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Virtual NMIs	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Activate VMX-preemption timer	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Process posted interrupts	1	0h	0h	0h	0h	0h	0h	0h	1h	1h	1h	0h	1h	1h
Reserved	24	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_TRUE_PROCBASED_CTLS	64	0000000000000000h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFF9FFFE04006172h	FFFBFFFE04006172h	FFFBFFFE04006172h
Allowed Zero Settings	32	0000000000000000h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h	0000000004006172h
Reserved	2	0h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h
Interrupt-window exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use TSC offsetting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	3	0h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h
HLT exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
INVLPG exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
MWAIT exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
RDPMC exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
RDTSC exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
CR3-load exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR3-store exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR8-load exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR8-store exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use TPR shadow	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
NMI-window exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
MOV-DR exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Unconditional I/O exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use I/O bitmaps	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Monitor trap flag	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Use MSR bitmaps	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
MONITOR exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
PAUSE exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Activate secondary controls	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	0000000000000000h	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFF9FFFEh	00000000FFFBFFFEh	00000000FFFBFFFEh
Reserved	2	0h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h	2h
Interrupt-window exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Use TSC offsetting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	3	0h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h	7h
HLT exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
INVLPG exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MWAIT exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
RDPMC exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
RDTSC exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
CR3-load exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
CR3-store exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
CR8-load exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
CR8-store exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Use TPR shadow	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
NMI-window exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MOV-DR exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Unconditional I/O exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Use I/O bitmaps	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Monitor trap flag	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Use MSR bitmaps	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
MONITOR exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
PAUSE exiting	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Activate secondary controls	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
IA32_VMX_TRUE_EXIT_CTLS	64	0000000000000000h	007FFFFF00036DFBh	007FFFFF00036DFBh	007FFFFF00036DFBh	007FFFFF00036DFBh	007FFFFF00036DFBh	01FFFFFF00036DFBh	01FFFFFF00036DFBh	01FFFFFF00036DFBh	037FFFFF00036DFBh	01FFFFFF00036DFBh	137FFFFF00036DFBh	F77FFFFF00036DFBh
Allowed Zero Settings	32	0000000000000000h	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh	0000000000036DFBh
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Save debug controls	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	6	0h	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh
Host address space size 64	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Load IA32_PERF_GLOBAL_CTRL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Acknowledge interrupt on exit	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Save IA32_PAT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_PAT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Save IA32_EFER	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_EFER	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Save VMX-preemption timer value	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Clear IA32_BNDCFGS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Conceal VM exits from Intel PT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Clear IA32_RTIT_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Clear IA32_LBR_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Clear UINV	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load CET state	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load PKRS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Save IA32_PERF_GLOBAL_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Activate secondary exit controls	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	0000000000000000h	00000000007FFFFFh	00000000007FFFFFh	00000000007FFFFFh	00000000007FFFFFh	00000000007FFFFFh	0000000001FFFFFFh	0000000001FFFFFFh	0000000001FFFFFFh	00000000037FFFFFh	0000000001FFFFFFh	00000000137FFFFFh	00000000F77FFFFFh
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Save debug controls	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	6	0h	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh
Host address space size 64	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Load IA32_PERF_GLOBAL_CTRL	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Acknowledge interrupt on exit	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Save IA32_PAT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_PAT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Save IA32_EFER	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_EFER	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Save VMX-preemption timer value	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Clear IA32_BNDCFGS	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	0h	1h	0h	0h
Conceal VM exits from Intel PT	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
Clear IA32_RTIT_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	1h	1h
Clear IA32_LBR_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Clear UINV	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load CET state	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
Load PKRS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Save IA32_PERF_GLOBAL_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Activate secondary exit controls	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
IA32_VMX_TRUE_ENTRY_CTLS	64	0000000000000000h	0000FFFF000011FBh	0000FFFF000011FBh	0000FFFF000011FBh	0000FFFF000011FBh	0000FFFF000011FBh	0003FFFF000011FBh	0003FFFF000011FBh	0003FFFF000011FBh	0006FFFF000011FBh	0003FFFF000011FBh	0016FFFF000011FBh	0076FFFF000011FBh
Allowed Zero Settings	32	0000000000000000h	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh	00000000000011FBh
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Load debug controls	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	6	0h	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh
IA-32e mode guest	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Entry to SMM	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Deactivate dual-monitor treatment	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_PERF_GLOBAL_CTRL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_PAT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_EFER	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_BNDCFGS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Conceal VM entries from Intel PT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load IA32_RTIT_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load UINV	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load CET state	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load guest IA32_LBR_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load PKRS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	9	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Allowed One Settings	32	0000000000000000h	000000000000FFFFh	000000000000FFFFh	000000000000FFFFh	000000000000FFFFh	000000000000FFFFh	000000000003FFFFh	000000000003FFFFh	000000000003FFFFh	000000000006FFFFh	000000000003FFFFh	000000000016FFFFh	000000000076FFFFh
Reserved	2	0h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h	3h
Load debug controls	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	6	0h	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh	3Fh
IA-32e mode guest	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Entry to SMM	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Deactivate dual-monitor treatment	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_PERF_GLOBAL_CTRL	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_PAT	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_EFER	1	0h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h	1h
Load IA32_BNDCFGS	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	0h	1h	0h	0h
Conceal VM entries from Intel PT	1	0h	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h
Load IA32_RTIT_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	0h	1h	1h
Load UINV	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Load CET state	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
Load guest IA32_LBR_CTL	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Load PKRS	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Reserved	9	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_VMFUNC	64	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h
Allowed One Settings	64	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h	0000000000000001h
EPTP switching	1	0h	0h	0h	0h	0h	1h	1h	1h	1h	1h	1h	1h	1h
Reserved	63	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_PROCBASED_CTLS3	64	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000001h	000000000000000Fh
Allowed One Settings	64	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000001h	000000000000000Fh
LOADWIKEY exiting	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h	1h
Enable HLAT	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
EPT paging-write control	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
Guest-paging verification	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	1h
IPI virtualization	1	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
Reserved	59	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h
IA32_VMX_EXIT_CTLS2	64	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h
Allowed One Settings	64	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h	0000000000000000h
Reserved	64	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h	0h