PsReadMsr

Reads a model-specific register and returns its value.

Syntax

PULSE_STATUS PsReadMsr(
[in] PPS_ENGINE pEngine,
[in] uint32_t MsrNumber,
[in] uint64_t *pMsrValue
);

Parameters

PPS_ENGINE pEngine

An opaque handle to an engine created by the EngCreateEngine function.

uint32_t MsrNumber

The number of the model-specific register. Refer to the Intel Software Developers Manual for MSR numbers available on your platform.

uint64_t *pMsrValue

A pointer to the 64-bit value of the model-specific register to be read.

Return value

If the function succeeds, the return value is PULSE_STATUS_SUCCESS.

If it fails, it returns one of the PULSE_STATUS values. Possible return codes include, but are not limited to, the following:

PULSE_STATUS_INSUFFICIENT_RESOURCES 0xC0000002	One of the memory allocations failed during initialization.
PULSE_STATUS_READ_FAILED 0xC0000003	Transport communication failed during a read operation.
PULSE_STATUS_WRITE_FAILED 0xC0000004	Transport communication failed during a write operation.
PULSE_STATUS_TIMEOUT 0xC0000007	Might happen if Transport I/O timed out. No response was received from the debuggee within the request timeout period.
PULSE_STATUS_INVALID_PARAMETER 0xC0000010	The pEngine parameter is NULL.
PULSE_STATUS_INVALID_PACKET 0xC0000031	An invalid or unexpected packet was received in response.
PULSE_STATUS_DEVICE_CONNECTION_LOST 0xC0000308	The connection to the transport was lost. Try restarting the engine or the transport.
PULSE_STATUS_EXCEPTION_GENERAL_PROTECTION 0xC001000D	Reading the MSR with the RDMSR instruction caused a #GP exception. This may occur if an invalid MSR number is specified.

Remarks

Even though the RDMSR instruction is executed in VMX-root mode, the result is adjusted to reflect the value that the guest debuggee would get for the following MSRs:

IA32_SYSENTER_CS	0x00000174
IA32_SYSENTER_ESP	0x00000175
IA32_SYSENTER_EIP	0x00000176
IA32_SMBASE	0x0000009E
IA32_DEBUGCTL	0x000001D9
IA32_PAT	0x00000277
IA32_EFER	0xC0000080
IA32_PERF_GLOBAL_CTRL	0x0000038F
IA32_BNDCFGS	0x00000D90
IA32_RTIT_CTL	0x00000570
IA32_PKRS	0x000006E1
IA32_S_CET	0x000006A2
IA32_INTERRUPT_SSP_TABLE_ADDR	0x000006A8
IA32_FEATURE_CONTROL	0x0000003A

The result of executing the RDMSR instruction may vary between CPU cores due to differences in microarchitecture or microcode versions.